SPLASH 2025
Sun 12 - Sat 18 October 2025 Singapore
co-located with ICFP/SPLASH 2025
Mon 13 Oct 2025 14:50 - 15:20 at Peony SE - Session 2 Chair(s): Conrad Watt

Static analysis consists of a large body of tools that analyze programs without running them. Despite substantial progress in recent years, both theoretical and practical, static analyses still face bottlenecks in SMT solving, equivalence checking, and compiler verification. This work proposes alleviating these bottlenecks by using information derived from existing compilers, and asks whether such information is enough to inform static analysis and expand the set of tractable problems. We plan to investigate the problem by instrumenting a compiler to provide transformation records, which record of the analyses and optimizations a compiler performs on a particular input program. In existing work, we find that the strategy is promising by showing that compiler information can speed up SMT solving. Our proposal is to extend the work to a general instrumentation and filtering framework and evaluate it on translation validation and other use cases.

Mon 13 Oct

Displayed time zone: Perth change

13:40 - 15:20
Session 2Doctoral Symposium at Peony SE
Chair(s): Conrad Watt Nanyang Technological University
13:40
30m
Talk
How to Synthesize Quantum-Circuit Optimizers
Doctoral Symposium
Amanda Xu University of Wisconsin-Madison
14:15
30m
Talk
Separation Logics for Probability, Concurrency, and Security
Doctoral Symposium
Kwing Hei Li Aarhus University
14:50
30m
Talk
Towards Compiler-Guided Static Analysis
Doctoral Symposium
Benjamin Mikek Georgia Institute of Technology